Electrical computers and digital processing systems: processing – Processing architecture – Microprocessor or multichip or multimodule processor having...
Reexamination Certificate
1997-06-26
2001-08-14
Follansbee, John A. (Department: 2154)
Electrical computers and digital processing systems: processing
Processing architecture
Microprocessor or multichip or multimodule processor having...
C710S008000
Reexamination Certificate
active
06275923
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a data processing method and apparatus. More to particularly this invention relates to a data processing method and apparatus for use in engine control of an engine development.
1. Description of the Prior Art
Formerly, for example, a multi computer system shown in Japanese Patent Application Laid Open SHO 62-139064 is used as a data processing apparatus of a computer. The data processing apparatus has the object that it eliminates complication or trouble on adaptive manipulation in response to various applicable examples.
FIG. 1
is configuration view showing one example of the data processing apparatus. In
FIG. 1
, a free programmable read only memory (PROM)
1102
is allocated to the first computer
1101
. Data exchange between the first computer
1101
and the free programmable read only memory
1102
is performed through a data path
1103
. Read only memory
1105
is allocated on the second computer
1104
. Data exchange between the second computer
1104
and the memory
1105
is performed through a data path
1106
. The first computer
1101
has a write-read memory (random access memory)
1107
. The second computer
1104
also a write-read memory
1108
. Series data connection path (channel)
1109
is provided between the first computer
1101
and the second computer
1104
. The first computer has a series input
1110
.
In the apparatus of this constitution, it is capable of filing
16
pieces of different data sets fixedly into the read memory of the second computer
1104
. The free programmable memory
1102
is accessed by the first computer
1101
. The following memory cells are provided for the free programmable memory
1102
. In case of constitution for computer system arrangement, a memory cell into which numbers of data-set intended to use in the second computer
1104
based on the suitable input to the first computer
1101
is filed, is provided within the memory cells. The numbers of data-set are memorized fixedly until when new constitution of computer system arrangement is implemented to the programmable memory
1102
. Starting time of program progression, for example, at the time of making of operating voltage, the first computer
1101
transmits the number of data-set to the second computer
1104
through the series connection path (channel)
1109
in each time it happens. The second computer
1104
memorizes the number of data-set into its own write-read memory
1108
based thereon. When the second computer
1104
employs data from the read memory
1105
, the second computer
1104
fetches the data from the numbers of data-set memorized on its own write-read memory
1108
. Besides, when the operating power supply is off, and the computer system is off, the number filed in the write-read memory is disappeared. At the time of starting of the system, the data-set is newly memorized thereon.
Now, in the data processing apparatus for use in engine control of an engine development, work of tuning for confirming result while changing various control parameters is required in order to obtain required engine characteristics. When the above described apparatus is used as the data processing apparatus, it permits a data-set of control parameter to set to the read only memory
1105
beforehand. A control parameter is capable of being changed by virtue of a data-set number supplied from the programmable memory
1102
based on the suitable input to the first computer
1101
while setting data-set of the control parameter to the read only memory
1105
beforehand.
However, the number of data-set set in the read memory
1105
beforehand is confined, also number of the data-set number provided by the programmable memory
1102
is confined. There is required that it implements new program operation such as disconnection of both of operating power supply and the computer system, and change of read only memory
1105
into another one with different data-set, in order to implement tuning of control parameter which requires enormous numeric combination. Such trouble comes into one cause which lengthen development period of engine. There is requirement that change of control parameter is intended to perform in the condition that the engine remains operated to perform rapid tuning while shortening the development period.
SUMMARY OF THE INVENTION
In view of the foregoing, it is an object of the present invention to provide data processing method and apparatus which is capable of performing rapid tuning exception for disconnecting of operating power source or disconnecting of the computer system.
According to one aspect of the present invention, for achieving the above-mentioned object, there is provided a data processing apparatus having a CPU core for executing a program operation for the purpose of implementing data processing, a non-volatile memory storing data referred to at the time of data processing, a RAM for data tuning, a register for memorizing data-stored-address, and a comparator for comparing address, wherein when the data-stored-address is outputted while rewriting the RAM during execution the CPU core, the CPU core refers to data stored within the RAM instead of data stored within the non-volatile memory. Namely, the comparator is brought into effective when it permits the RAM to rewrite before the data-stored-address is memorized within the register, at the time when the comparator is brought into effective the comparator compares the data-stored-address memorized within register with an address outputted from the CPU core, when both correspond with each other, the comparator brings a RAM selection signal into active, and brings a PROM selection signal into inactive. Furthermore, in this case, two memory regions are established in the RAM, respective two registers and two comparators are provided corresponding to respective memory region, and the data-stored-address is memorized within corresponding register after corresponding memory region being rewritten, corresponding comparator is brought into effective.
According to another aspect of the present invention, a data processing method is executed in the data processing apparatus which comprises a CPU core for executing a program operation for the purpose of implementing data processing, a non-volatile memory storing data referred to at the time of data processing, a RAM for data tuning, a register for memorizing data-stored-address, and a comparator for comparing address, wherein it permits the program operation to execute referring to data stored within an address corresponding to the PROM based on address outputted from the CPU core, which executes program operation referring to the data stored within the RAM instead of the data stored within the non-volatile memory when the data-stored-address is outputted with the RAM rewritten during execution of the CPU core. Namely, the data processing method memorizes the data-stored-address into the register when the RAM is rewritten, bringing the comparator into effective when memorizing is implemented to the register, comparing an address outputted from the CPU core with the data-stored-address memorized within the register, reading a data stored within the RAM of the address when both addresses correspond with each other, and executing program operation while the CPU core referring to the data which is read out. Furthermore, in this case, two memory regions are established in the RAM, respective two registers and comparators corresponding to respective memory region are provided, and data of any one of the memory regions, the data-stored-address is memorized into corresponding register, and corresponding comparator is brought into effective.
The above and further objects and novel features of the invention will be more fully understood from the following detailed description when the same is read in connection with the accompanying drawings. It should be expressly understood, however, that the drawings are for purpose of illustration only and are not intended as a definition of the limits of the invention
Follansbee John A.
NEC Corporation
Sughrue Mion Zinn Macpeak & Seas, PLLC
LandOfFree
Data processing method and apparatus does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Data processing method and apparatus, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Data processing method and apparatus will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2452545