Data processing machine with interrupt control for varying proce

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273 85G, 273DIG28, 364200, 3642703, G06F 1300, A63F 922

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active

049812963

ABSTRACT:
A data processing machine is provided with a microprocessor that functions in response to signals output by a clock oscillator to selectively change the data-processing speed of the microprocessor. The data processing machine contains a circuit for generating interruption signals at specific intervals by dividing the signals output by the clock oscillator, a signal-input device for inputting command signals that cause the microprocessor to change the data-processing speed, and a controller which, in response to signals from the input device, executes a stand-by process each time a specific number of interruption signals generated by the interruption signal generating circuit is received.

REFERENCES:
patent: 3974479 (1976-08-01), Kotok et al.
patent: 4434461 (1984-02-01), Puhl
patent: 4631702 (1986-12-01), Korba
patent: 4835681 (1989-05-01), Culley
IBM Technical Disclosure Bulletin, vol. 22, No. 7, Dec., 1979, pp. 2647, 2648, New York, U.S.; J. W. Cannon: "Microcode Timer", page 2648, paragraph 1.
Patents Abstracts of Japan, vol. 6, No. 70 (P-113) [948], 6th May, 1982; JP-A-57 8849 (Fujitsu K.K.) 18-01-1982, Abstract.
IBM Technical Disclosure Bulletin, vol. 27, No. 3, Aug., 1984, pp. 1695, 1696, New York, U.S.; M. Dean et al.: "Wait-State Generator", whole document.
IBM Technical Disclosure Bulletin, vol. 25, No. 5, Oct., 1982, p. 2705, New York, U.S.; J. D. Dixon et al.; "Programmable Instruction Cycle Time".

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