Data processing device with mask and status bits for...

Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate plural instruction...

Reexamination Certificate

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C712S234000

Reexamination Certificate

active

06253307

ABSTRACT:

(C) Copyright 1989 Texas Instruments Incorporated. A portion of the disclosure of this patent document contains material which is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction by anyone of the patent disclosure, as it appears in the Patent and Trademark Office patent file or records, but otherwise reserves all copyright rights whatsoever.
BACKGROUND OF THE INVENTION
A microprocessor device is a central processing unit or CPU for a digital processor which is usually contained in a single semiconductor integrated circuit or “chip” fabricated by MOS/LSI technology, as shown in U.S. Pat. No. 3,757,306, issued to Gary W. Boone and assigned to Texas Instruments Incorporated. The Boone patent shows a single-chip 8-bit CPU including a parallel ALU, registers for data and addresses, an instruction register and a control decoder, all interconnected using the von Neumann architecture and employing a bidirectional parallel bus for data, address and instructions. U.S. Pat. No. 4,074,351, issued to Gary W. Boone and Michael J. Cochran, assigned to Texas Instruments Incorporated, shows a single-chip “microcomputer” type device which contains a 4-bit parallel ALU and its control circuitry, with on-chip ROM for program storage and on-chip RAM for data storage, constructed in the Harvard architecture. The term microprocessor usually refers to a device employing external memory for program and data storage, while the term microcomputer refers to a device with on-chip ROM and RAM for program and data storage. In describing the instant invention, the term “microcomputer” will be used to include both types of devices, and the term “microprocessor” will be primarily used to refer to microcomputers without on-chip ROM. Since the terms are often used interchangeably in the art, however, it should be understood that the use of one of the other of these terms in this description should not be considered as restrictive as to the features of this invention.
Modern microcomputers can be grouped into two general classes, namely general-purpose microprocessors and special-purpose microcomputers/microprocessors. General purpose microprocessors, such as the M68020 manufactured by Motorola, Inc. are designed to be programmable by the user to perform any of a wide range of tasks, and are therefore often used as the central processing unit in equipment such as personal computers. Such general-purpose microprocessors, while having good performance for a wide range of arithmetic and logical functions, are of course not specifically designed for or adapted to any particular one of such functions. In contrast, special-purpose microcomputers are designed to provide performance improvement for specific predetermined arithmetic and logical functions for which the user intends to use the microcomputer. By knowing the primary function of the microcomputer, the designer can structure the microcomputer in such a manner that the performance of the specific function by the special-purpose microcomputer greatly exceeds the performance of the same function by the general-purpose microprocessor regardless of the program created by the user.
One such function which can be performed by a special-purpose microcomputer at a greatly improved rate is digital signal processing, specifically the computations required for the implementation of digital filters and for performing Fast Fourier Transforms. Because such computations consist to a large degree of repetitive operations such as integer multiply, multiple-bit shift, and multiply-and-add, a special-purpose microcomputer can be constructed specifically adapted to these repetitive functions. Such a special-purpose microcomputer is described in U.S. Pat. No. 4,577,282, assigned to Texas Instruments Incorporated and incorporated herein by reference. The specific design of a microcomputer for these computations has resulted in sufficient performance improvement over general purpose microprocessors to allow the use of such special-purpose microcomputers in real-time applications, such as speech and image processing.
Digital signal processing applications, because of their computation intensive nature, also are rather intensive in memory access operations. Accordingly, the overall performance of the microcomputer in performing a digital signal processing function is not only determined by the number of specific computations performed per unit time, but also by the speed at which the microcomputer can retrieve data from, and store data to, system memory. Prior special-purpose microcomputers, such as the one described in said U.S. Pat. No. 4,577,282, have utilized modified versions of a Harvard architecture, so that the access to data memory may be made independent from, and simultaneous with, the access of program memory. Such architecture has, of course provided for additional performance improvement.
The increasing demands of technology and the marketplace make desirable even further structural and process improvements in processing devices, systems and methods of operation and manufacture.
Among the objects of the present invention are to provide improved data processing devices, systems and methods that avoid time-consuming processor operation disruptions due to unnecessary branching; to provide improved data processing devices, systems and methods that enhance operational flexibility, computational resolution, and increase system and processor throughput; to provide improved data processing devices, systems and methods for simplifying hardware at device and system levels; and to provide improved data processing devices, systems and methods for real-time operation.
SUMMARY OF THE INVENTION
In general, one form of the invention is a data processing device including a circuit having status conditions wherein a particular set of the status conditions can occur in operation of the circuit. An instruction register holds a branch instruction conditional on a particular set of the status conditions. A decoder is connected to the instruction register and the circuit. Further, a program counter is coupled to the decoder wherein the decoder is operable to enter a branch address into the program counter in response to the branch instruction when the particular set of the status conditions of the circuit are present.
Generally, another form of the invention is a data processing system including an analog-to-digital converter and an electronic processor connected to the analog-to-digital converter and having an electronic computation unit for executing operations and an accumulator having status conditions including A) carry, B) overflow and C) contents relative to a predetermined number wherein a particular one or more of the status conditions can occur in operation. An instruction register is operative to hold a conditional instruction directing the electronic processor to execute a further operation provided the particular status condition is present. A control circuit is connected to the instruction register and the accumulator to cause the processor to execute the further operation when the conditional instruction and the particular status condition are present and otherwise to cause the electronic processor to omit the further operation when the conditional instruction is present and the particular status condition is absent.
Other device, system and method forms of the invention are also disclosed and claimed herein. Other objects of the invention will be apparent from the disclosure herein.


REFERENCES:
patent: 3753234 (1973-08-01), Gilbert et al.
patent: 3984816 (1976-10-01), Cochran et al.
patent: 3987416 (1976-10-01), Vandierendonck et al.
patent: 4200926 (1980-04-01), Cochran et al.
patent: 4942525 (1990-07-01), Shintami et al.
patent: 4991080 (1991-02-01), Emma et al.
patent: 5022059 (1991-06-01), Arai
patent: 5081574 (1992-01-01), Larsen et al.
patent: 5440704 (1995-08-01), Itomitsu et al.

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