Data processing device having selective data cache...

Details Data processing device having selective data cache... Data processing device having selective data cache...

2007-11-20

2007-11-20

Peikari, B. James (Department: 2189)

Electrical computers and digital processing systems: processing

Processing architecture

Microprocessor or multichip or multimodule processor having...

C712S034000, C711S130000, C711S120000, C711S119000

Reexamination Certificate

active

10774775

ABSTRACT:
The disclosure is a data processing device with selective data cache architecture and a computer system including the data processing device. The data processing device is comprised of a microprocessor, a coprocessor, a microprocessor data cache, an X-data cache, and a Y-data cache. The microprocessor fetches and executes instructions, and the coprocessor carries out digital signal processing functions. The microprocessor data cache stores data provided from the microprocessor. The X-data cache stores a first group of data provided from the coprocessor while the Y-data cache stores a second group of data provided from the coprocessor.

REFERENCES:
patent: 5686960 (1997-11-01), Sussman et al.
patent: 6170049 (2001-01-01), So
patent: 6279489 (2001-08-01), Daniel
patent: 6369855 (2002-04-01), Chauvel et al.
patent: 2004/0160637 (2004-08-01), Tuli

Affiliated with

Also associated with

Rating

Data processing device having selective data cache... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Data processing device having selective data cache..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Data processing device having selective data cache... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3835945