Data processing device for reducing the number of internal bus l

Details Data processing device for reducing the number of internal bus l Data processing device for reducing the number of internal bus l

1993-07-01

1995-08-08

Ray, Gopal C.

Boots, shoes, and leggings

3642384, 364240, 3642402, 3642405, 364239, 3642443, 364DIG1, 395445, G06F 1300

Patent

active

054406960

ABSTRACT:
An internal address bus, which is connected between a bus control unit and a memory control unit, is formed by a bidirectional bus. The bidirectional internal address bus is connected to an external address transferring bus which is used to transfer a write address in a system bus to the memory control unit. The bidirectional internal address bus is commonly used for renewal and invalidation of first and second buffers for an instruction cache and operand cache. Therefore, in the present invention, the number of the internal bus lines can be reduced, a control constitution can be simplified, and a consistency of contents in a plurality of internal buffers and the main memory can be easily maintained.

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