Electrical computers and digital processing systems: processing – Instruction issuing
Reexamination Certificate
2001-07-26
2004-10-19
Tsai, Henry W. H. (Department: 2183)
Electrical computers and digital processing systems: processing
Instruction issuing
C712S215000
Reexamination Certificate
active
06807623
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a data processing control system, a controller, a data processing control method, a program, and a medium.
2. Description of the Related Art
(A) With recent advances in multimedia technology, continuous media data such as digitized moving image data, voice data, etc. have increasingly come to be stored on hard disks and other data storage devices (random access devices) Because of huge data sizes of continuous media data, it is becoming common to configure a plurality of random access devices into an array and make the array appear to the system as a single large capacity virtual device.
With this trend in mind, the configuration and operation of a prior art data storage array system will be described with reference to FIGS.
11
(
a
),
11
(
b
), and
13
. FIG.
11
(
a
) is a flow chart of a semaphore acquisition operation according to the prior art, and FIG.
11
(
b
) is a flow chart of a semaphore release operation.
FIG. 13
is a diagram showing the configuration of the prior art data storage array system.
As shown in
FIG. 13
, the prior art data storage array system comprises a controller
1001
′ and data storage devices
1021
′,
1022
′, . . . ,
102
n′.
When a data access request is received from an external host device
1003
′ (see FIG.
13
), the controller
1001
′ generates a child thread to control access to the data storage devices
1021
′, . . . ,
102
n
′. The data storage array system can thus accept a plurality of data access requests simultaneously (command queuing). With command queuing, the data storage array system can perform data access and command issuing operations in overlapping fashion on the data storage devices, and data access performance can thus be enhanced.
In the child thread, the data access request issued by the external host device
1003
′ is divided into a plurality of requests to issue to the data storage devices
10211
,
102
n
′. When all the data access requests to the data storage devices
1021
′, . . . ,
102
n
′ are completed, the child thread sends a completion notification to the external host device
1003
′.
In the child thread generated by the controller
1001
′, access control is performed using a synchronization mechanism called a semaphore in order to prevent excessive load from being applied to the data storage devices
1021
′, . . . ,
102
n
′. To facilitate understanding, the semaphore will be briefly explain below.
A semaphore is a synchronization mechanism used to control access rights to system resources. In operation, access to the system is controlled by performing a semaphore acquisition operation just before accessing a system resource and by performing a semaphore release operation upon completing the access to the system resource.
Here, let A denote the maximum allowed number of simultaneous accesses to a system resource and B the maximum number of accesses currently being made to the system resource. Then, as shown in the process of FIG.
11
(
a
), the semaphore acquisition operation is started (S1), and if A>B, the semaphore is successfully acquired, granting the request for access to the system resource, after which B is incremented and the semaphore acquisition operation is terminated (S2, S4, and S5). On the other hand, if A≦B, the semaphore acquisition operation waits until B becomes smaller than A (S3). In the process shown in FIG.
11
(
b
), the semaphore release operation is started (S6), and then, B is decremented and the semaphore release operation is terminated (S7 and S8).
In this way, in the prior art data storage array system, the controller
1001
′ controls access rights to the data storage devices
1021
′, . . . ,
102
n
′ (system resources) by using semaphores in order to prevent excessive load from being applied to the data storage devices
1021
′, . . . ,
102
n′.
(B) With recent advances in multimedia technology, continuous media data such as digitized moving image data, voice data, etc. have increasingly come to be stored on hard disks and other data storage devices (random access devices). Because of huge data sizes of continuous media data, it is becoming common to configure a plurality of random access devices into an array and make the array appear to the system as a single large capacity virtual device. To implement this, RAID (Redundant Array of Inexpensive Disks) technology, which improves reliability by managing data storage by providing redundancy to continuous media data stored in an array of random access devices, has been attracting attention.
The configuration and operation of a prior art data storage array system of RAID
3
will be described below.
FIG. 25
is a diagram showing the configuration of a data storage array system of RAID
3
according to the prior art. FIGS.
26
(
a
) and
26
(
b
) are flow charts illustrating the operation of a controller
1
in the prior art data storage array system of RAID
3
.
FIG. 28
is a flow chart of semaphore acquisition and release operations according to the prior art.
As shown in
FIG. 25
, the prior art data storage array system of RAID
3
comprises the controller
1
, data storage devices
21
to
2
n
and a redundancy calculator
3
. The controller
1
receives a data access request issued by an external host device
4
, converts it into internal access requests, issues them to the data storage devices
21
to
2
n
, and sends a completion notification to the external host device
4
when the internal data access requests to the data storage devices
21
to
2
n
are completed or when a timeout has occurred. The data storage devices
21
to
2
n
are devices for storing data. When the data access request issued by the external host device
4
is a write request, the redundancy calculator
3
generates redundant data using the write data from the external host device
4
before issuing the internal data access requests to the data storage devices
21
to
2
n
; on the other hand, when it is a read request, the redundancy calculator
3
restores write data using redundant data if the write data is lost because of the occurrence of a timeout. The external host device
4
is a device that issues data access requests.
Next, the operations performed by the controller
1
in response to an external data access request will be described in detail with reference to FIGS.
26
(
a
) and
26
(
b
). The following description is given based on the premise that the controller
1
is operating in a multi-threaded programming (multi-processing programming) environment.
The controller
1
waits for a data access request from the external host device
4
(S1). When a data access request is received from the external host device
4
, the controller
1
generates a child thread to process the data access request (S2). The data storage array system can thus accept a plurality of data access requests simultaneously (command queuing). In the generated child thread, the data access request is converted into n internal data access requests (S3). In the case of RAID
3
, the conversion to the internal data access requests (S3) is performed so that the access data designated by the data access request is divided across (n−1) disks and the redundant data generated based on the access data is stored on the remaining one disk.
FIG. 27
shows how the conversion to the internal data access requests is accomplished. After S
3
, the controller
1
examines whether the data access request received from the external host device
4
is a read request or a write request (S4).
If the data access request received from the external host device
4
is a write request, the controller
1
, using the redundancy calculator
3
, generates redundant data by duplicating the write data (S5). Next, the controller
1
acquires access rights to the data storage devices
21
to
2
n
by performing the semaphore acquisition operation (S6). The controller
1
, w
Furuya Shinji
Migita Manabu
Nishikawa Junji
Okabayashi Ichiro
Matsushita Electric - Industrial Co., Ltd.
RatnerPrestia
Tsai Henry W. H.
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