Data processing circuits and interfaces

Details Data processing circuits and interfaces Data processing circuits and interfaces

1997-03-24

2001-10-30

Pan, Daniel H. (Department: 2183)

Electrical computers and digital processing systems: processing

Processing architecture

Microprocessor or multichip or multimodule processor having...

C712S029000, C712S030000, C711S169000, C711S168000, C710S120000, C710S045000, C710S117000

Reexamination Certificate

active

06311263

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates primarily to single-chip data processing devices, but also to microprocessors and to digital circuits generally, and to interface circuits.
In the present day, many products incorporate microprocessor based data processing circuits, for example to process signals, to control internal operation and/or to provide communications with users and external devices. To provide compact and economical solutions, particularly in mass-market portable products, it is known to include microprocessor functionality together with program and data storage and other specialised circuitry, in a custom “chip” also known as an application-specific integrated circuit (ASIC). Field Programmable Gate Arrays (FPGA) such as those made by Xilinx™, Actel™ and Altera™ may also be used to implement such solutions.
However, for various reasons, the integrated microprocessor functionality conventionally available to an ASIC designer tends to be the same as that which would be provided by a microprocessor designed for use as a separate chip. The present inventors have recognised that this results in inefficient use of space and power in the ASIC solution, and in fact renders many potential applications of ASIC technology impractical and/or uneconomic.
SUMMARY OF THE INVENTION
Various aspects of the invention are defined in the appended claims, while the applicant reserves the right to claim any further aspects of the invention that may be disclosed herein.
In accordance with certain aspects of the present invention, microprocessor architectures are proposed which overcome the above drawbacks, being optimised for integration within an ASIC by providing a combination of functional features and architectural features unlike any conventional microprocessor.
For example, in a conventional general purpose microprocessor, the arithmetic and logic unit (ALU) has a certain data width (eight bits, sixteen bits etc.), and provides operations of arithmetic addition or subtraction, logical AND, OR combinations and left and right bit shifts, all on data of this basic width. One aspect of the invention disclosed herein is to provide a separate shifting unit, wider than the ALU width, which allows multiplication and division of two numbers, each as wide as the ALU itself, in a circuit of relatively small size. The shifter will typically be associated with one double-width register of the processor.
Other aspects of the invention relate to the provision of special functional features and interfaces within the chip and/or between the chip and the external environment. While these other aspects can be employed advantageously in the novel processor architecture proposed herein, it will be apparent that these specific techniques are in fact applicable and advantageous in a wide range of different microprocessor architectures, or even in the field of sequential digital circuitry generally irrespective of whether it is program-controlled or not.
As one particular such feature, the invention in another aspect provides, in a program controlled processor, a mechanism whereby response to external stimuli is provided automatically, but only at times known in advance to the programmer. Examples of such stimuli include requests for communication from external devices, and entry of “sleeping” state for power conservation. In the present embodiments, special instructions are defined whereby the programmer can define fixed periods in which external communication may take place, and fixed points for entry into the sleeping state.
The various aspects of the invention will become apparent from the following description of specific embodiments. These are presented by way of example only, with reference to the accompanying drawings.


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