Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing
Patent
1992-12-09
1995-09-05
Callahan, Timothy P.
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Synchronizing
327154, 327293, 327299, 327 58, H03K 513
Patent
active
054481929
ABSTRACT:
An information processing system comprises a sub-circuits, each performing a part of the processing of the information or data. The operation of the sub-circuits is synchronized by means of clock signals applied to clock inputs of the sub-circuits. The clock signals are derived from a system clock and are transferred to each sub-circuit via the sub-circuit or sub-circuits preceding that sub-circuit in the data processing chain. To avoid deterioration of the clock pulses while they are transferred between the sub-circuits, clock regeneration circuitry is arranged in the chain of sub-circuits. The clock regeneration circuitry is preferably integrated together with the data-processing sub-circuits.
REFERENCES:
patent: 3760282 (1973-09-01), Arnold et al.
patent: 4015144 (1977-03-01), Brouckaert
patent: 4021685 (1977-05-01), Goodall et al.
patent: 4585952 (1986-04-01), Yamamoto
patent: 4686482 (1987-08-01), Zoetman et al.
patent: 4761567 (1988-08-01), Walters, Jr. et al.
patent: 4801818 (1989-01-01), Schroedinger
patent: 4837463 (1989-06-01), Okitaka et al.
patent: 4847516 (1989-07-01), Fujita et al.
patent: 4870665 (1989-09-01), Vaughn
patent: 4929854 (1990-05-01), Iino et al.
patent: 4937468 (1990-06-01), Shekhawat et al.
patent: 5033067 (1991-07-01), Cole et al.
patent: 5140184 (1992-08-01), Hamamoto et al.
patent: 5150068 (1992-09-01), Kawashima et al.
patent: 5225175 (1993-07-01), Mori et al.
1990 IEEE Proceedings, "A Linear-Array WSI Architecture for Improved Yield and Performance" by Robert W. Horst, pp. 85-91.
"The Behavoir of Flip-Flops Used as Synchronizers and Prediction of Their Failure Rate", H. Veendrick, IEEE Journal of Solid-State Circuits, vol. SC-15, No. 2, Apr. 1980.
Callahan Timothy P.
Franzblau Bernard
Lam T.
U.S. Philips Corporation
LandOfFree
Data processing circuit including a plurality of serially clocke does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Data processing circuit including a plurality of serially clocke, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Data processing circuit including a plurality of serially clocke will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-474867