Electrical computers and digital processing systems: processing – Processing architecture – Array processor
Reexamination Certificate
2011-03-29
2011-03-29
Chan, Eddie P (Department: 2183)
Electrical computers and digital processing systems: processing
Processing architecture
Array processor
C712S036000
Reexamination Certificate
active
07917727
ABSTRACT:
An input/output system transfers data packets to and from a SIMD array of processing elements (PEs) such that different sizes of data packets are transferred to respective ones of the PEs. The packets are transferred in batches to respective different addresses in the array under the control of the PEs. Transfer to or from the array may be carried out when either a batch or part of a batch is ready for transfer. The decision to transfer either full or part batches is made in dependence upon the speed of the PEs and the speed and intermittency of the data packets.
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Bond Jeff
Cameron Ken
Dejaegher Matthias
Faulds Gordon
Halamish Danny
Chan Eddie P
Glenn Michael A.
Glenn Patent Group
Rambus Inc.
Vicary Keith
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