Data processing apparatus with parallel operating functional...

Electrical computers and digital processing systems: processing – Processing architecture – Long instruction word

Reexamination Certificate

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C711S100000, C711S200000, C711S202000, C711S219000, C711S220000, C712S206000, C712S214000, C712S215000

Reexamination Certificate

active

07664929

ABSTRACT:
A program of instruction words is executed with a VLIW data processing apparatus. The apparatus comprises a plurality of functional units capable of executing a plurality of instructions from each instruction word in parallel. The instructions from each of at least some of the instruction words are fetched from respective memory units in parallel, addressed with an instruction address that is common for the functional units. Translation of the instruction address into a physical address can be modified for one or more particular ones of the memory units. Modification is controlled by modification update instructions in the program. Thus, it can be selected dependent on program execution which instructions from the memory units will be combined into the instruction word in response to the instruction address.

REFERENCES:
patent: 5208781 (1993-05-01), Matsushima
patent: 5875483 (1999-02-01), Tremblay
patent: 6076159 (2000-06-01), Fleck et al.
patent: 7024538 (2006-04-01), Schlansker
patent: 2003/0145116 (2003-07-01), Moroney et al.
patent: 0473420 (1992-03-01), None

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