Data processing apparatus with abbreviated jump field

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3642318, 3642541, 3642613, 3642624, 3642628, G06F 932, G06F 938, G06F 926

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active

050088076

ABSTRACT:
The abbreviated jump field of the present invention enables each instruction word within the data processing apparatus to cause an instruction sequence branch to one of a limited number of destinations. Each instruction word of the data processing apparatus includes a limited number of bits which are decoded to specify one of a small set of instruction destinations. One of the possible destinations is the normal default destination of the next instruction word. In addition a relatively large number of branch instructions have been found to specify a rather limited number of destinations. In the preferred embodiment of the present invention the limited number of bits of the abbreviated jump field is employed to specify one of these widely used destinations. The widely used destinations may include a return instruction, a conditional skip of execution of the next instruction and various error handling and error recovery routines.

REFERENCES:
patent: 3699526 (1972-10-01), Iskiyan et al.
patent: 3793631 (1974-02-01), Silverstein et al.
patent: 4130869 (1978-12-01), Kinoshita et al.
patent: 4310880 (1982-01-01), Gehman
patent: 4407015 (1983-09-01), Ziobro
patent: 4415969 (1983-11-01), Bayliss et al.
patent: 4438492 (1984-03-01), Harmon, Jr. et al.
Intel Corporation; MCS-80/85 Family User's Manual; Oct. 1979; pp. 1-1-1-5, 5-13, 5-14, 5-17.

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