Boots – shoes – and leggings
Patent
1986-08-27
1989-08-01
Shaw, Gareth D.
Boots, shoes, and leggings
3642433, 364263, 364270, G06F 940
Patent
active
048538450
ABSTRACT:
Because a customary data processing apparatus consisting of a program control section, an arithmetic and logic element and a data memory, also referred to as a microprocessor or microcontroller when integrated on a semiconductor chip, is temporarily not loaded by a control function in many applications, it is desirable to perform a plurality of such slow control functions by means of one apparatus. In order to achieve this as effectively as possible, in accordance with the invention there are added a sequencer and an address memory which is controlled by the sequencer and which takes up each time the next instruction address of a given control function or process which is each time associated with a sequence control signal. FOr the arithmetic and logic element there is preferably provided a buffer memory which is also controlled by the sequencer. As a result, several processes can be simply performed in a time-interleaved manner; a pipe-line structure can be formed by utilizing further intermediate memories so that the individual elements of the apparatus can be very effectively used.
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Braune Dirk H.
Kaplinsky Cecil H.
Zimmer Gunther A. H.
Chun Debra A.
Shaw Gareth D.
U.S. Philips Corporation
Wieghaus Brian J.
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