Data processing apparatus and method for converting a fixed...

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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Reexamination Certificate

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11019097

ABSTRACT:
A data processing apparatus and method are provided for converting an m-bit fixed point number to a rounded floating point number having an n-bit significand, where n is less than m. The data processing apparatus comprises determination logic for determining the bit location of the most significant bit of the value expressed within the m-bit fixed point number, and low order bit analysis logic for determining from a selected number of least significant bits of the m-bit fixed point number a rounding signal indicating whether a rounding increment is required in order to generate the n-bit significand. Generation logic is then arranged in response to the rounding signal to generate a rounding bit sequence appropriate having regard to the bit location determined by the determination logic. Adder logic then adds the rounding bit sequence to the m-bit fixed point number to generate an intermediate result, whereafter normalisation logic shifts the intermediate result to generate the n-bit significand. At this point, due to the incorporation of the rounding information prior to the addition, the generated n-bit significand is correctly rounded.

REFERENCES:
patent: 4805128 (1989-02-01), Nelsen et al.
patent: 6131104 (2000-10-01), Oberman
patent: 6684232 (2004-01-01), Handlogten et al.
patent: 6990505 (2006-01-01), Ahmed
patent: 7062525 (2006-06-01), Lin
patent: 2001/0056453 (2001-12-01), Steele, Jr.

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