Data processing apparatus

Details Data processing apparatus Data processing apparatus

1995-05-31

1996-11-05

Beausoliel, Jr., Robert W.

Excavating

371 681, 3642683, 364DIG1, G06F 1134

Patent

active

055726623

ABSTRACT:
The invention provides a data processing apparatus wherein, when a trouble of a built-in RAM is detected, stopping of the system by a comparison check of the outputs of multiple CPUs is prevented and the trouble of the built-in RAM can be removed. The data processing apparatus includes a built-in RAM error detection section for detecting that an error occurs in a built-in RAM of any of processing sections, and an inhibition section for inhibiting, when the built-in RAM error detection section detects that a built-in RAM error occurs in at least one of the processing sections, the result of comparison outputted from the comparison section originating from the occurrence of the built-in RAM error. The data processing apparatus can be applied to various computer systems wherein multiple processing sections (CPUs) perform same operation and processing is performed while the outputs of the processing sections are compared with each other to confirm that the processing sections are performing same operation.

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