Data prefetch apparatus

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Details

G06F 938

Patent

active

045831637

ABSTRACT:
A data prefetch apparatus provided between a main memory formed of a plurality of memory blocks and an I/O device whose data transfer speed is slower than that of the main memory, comprising an address counter for the main memory and a data buffer for storing the data prefetched from the main memory. In the data prefetch apparatus, a full/empty detector is connected to the data buffer and a memory block detector is connected to the address counter and the data prefetch is interrupted when the over-access of the one of the memory block is detected and is restarted when the data buffer is empty and data request is supplied from the I/O device.

REFERENCES:
patent: 4110822 (1978-08-01), Porter et al.
patent: 4225922 (1980-09-01), Porter
patent: 4462073 (1984-07-01), Grondalski
patent: 4489378 (1984-12-01), Dixon et al.

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