Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate
2001-05-21
2002-07-16
Nelms, David (Department: 2818)
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
C365S189050
Reexamination Certificate
active
06421297
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to output drivers in an integrated circuit, such as a memory device, and more particularly, to compensation for changes in voltage applied to each driver element due to varying output data patterns, such that the output current is maintained at a target level.
2. Description of the Related Art
This section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present invention, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present invention. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
Integrated circuits typically include multiple outputs at which various types of signals are provided. Integrated circuits, such as memory devices (e.g., SRAMs, DRAMs), also typically include output drivers to drive output signals onto an output bus. Many such output drivers include open-drain or open-collector drive elements. When a logic HIGH level data output signal is on the output bus, the output drive element (e.g., a FET, a BJT, etc.) is in a non-conductive state. To provide a logical LOW level signal on the output bus, the driver element is placed in a conductive state such that an output current flows on the output bus. For many integrated circuit applications, it may be desirable to maintain this output current (i.e., the drive strength of the driver element) very close to a particular target level under all operating conditions.
Maintaining the output current close to the target level may be difficult if the integrated circuit includes multiple outputs. Often, the multiple output drive elements are connected to a shared voltage bus that provides power to the driver. If multiple drive elements are connected to the shared bus, the trace length may be long enough such that output-signal-dependent voltage drops are introduced on the bus. Depending on the size of the shared bus, the voltage drops experienced by a drive element may be substantial enough to affect the amount of output current that can be provided by that drive element. Further, the voltage drop experienced by any one driver element may vary depending on how many other drive elements simultaneously are in a conductive state. As a result, the output current provided by each drive element is related to the pattern of the output data signals provided at the outputs of the integrated circuit. Such data-pattern-dependent variations in output current provided by the various driver elements may be undesirable because they may result in weak data signals on the output bus, leading to potential data errors.
Techniques for reducing data-pattern-dependent variations in output driver current include eliminating or curtailing sharing of a given voltage bus. Alternatively, a large bus (i.e., low resistance) may be provided such that voltage drops are minimized. Unfortunately, such solutions can lead to significant increases in the size of the integrated circuit. For applications in which minimization of circuit size is desirable, increasing the size of the shared bus or reducing bus sharing may not be viable alternatives.
The present invention may address one or more of the problems set forth above.
REFERENCES:
patent: 5537070 (1996-07-01), Risinger
patent: 6140718 (2000-10-01), Suder et al.
patent: 6310809 (2001-10-01), Roohparvar et al.
Fletcher Yoder & Van Someren
Le Thong
Micro)n Technology, Inc.
Nelms David
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