Data path architecture for a LAN switch

Details Data path architecture for a LAN switch Data path architecture for a LAN switch

2006-10-31

2006-10-31

Shah, Chirag (Department: 2616)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S428000

Reexamination Certificate

active

07130308

ABSTRACT:
A packet switching device having a central shared memory and a number of medium access controllers each coupled to a communications medium to exchange data packets, and a controller coupled to each medium access controller via a data path to exchange data packets with the media access controller. The controller has a number of data path controllers each connected to each medium access controller to exchange a corresponding portion of the data packets with the medium access controller. The data path controllers each have a number of buffers to hold the portion of the data packets exchanged with the corresponding medium access controller. Each data path controller has a selector that selects the buffer from which to exchange the portion of the data packets with the central shared memory and control logic that controls the selector to concurrently select the buffer corresponding to the same medium access controller.

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Unter Mitarbeit von J. Wazeck; 16-Bit-Mikroprozessorsysteme, Springer-Verlag, Berlin Heidelberg New York 1982.

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