Data packet switch and method of operating same

Details Data packet switch and method of operating same Data packet switch and method of operating same

2007-10-30

2007-10-30

Nguyen, Hanh (Department: 2616)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S419000, C370S509000

Reexamination Certificate

active

10243294

ABSTRACT:
A high speed data packet switch comprising input and output ports and a switch fabric to link each input port to each output port wherein each connection between input and output ports comprises a dynamic buffer memory for storing at least one data packet for a minimum specified storing time is disclosed. When a data packet is received through an input port, it is written in all individual dynamic memory buffers connected to this input port so as to have a copy of the incoming data packet ready to go through any output port to support unicast, multicast and broadcast traffic. Given the architecture of the data packet switch and its control algorithm, dynamic memory buffers neither need to be refreshed nor their contents have to be restored after reading.

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VITESSE Semiconductor Corporation (741 Calle Plano, Camarillo, CA 93012.

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