Data output stage having feedback loops to precharge the output

Details Data output stage having feedback loops to precharge the output Data output stage having feedback loops to precharge the output

1991-04-26

1993-01-12

Westin, Edward P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307475, 307481, 307451, H03K 1704, H03K 19092

Patent

active

051793008

ABSTRACT:
A data output stage of the buffer type for CMOS logic circuits, being of the type having at least one pair of MOS transistors associated to drive an output node of said stage, comprises first and second feedback loops which are structurally independent and respectively connected between said node and a corresponding gate electrode of each transistor to precharge said output node at a predetermined value and reduce the noise to ground during the switching phase.

REFERENCES:
patent: 4490633 (1984-12-01), Noufer et al.
patent: 4612466 (1986-09-01), Stewart
patent: 4963774 (1990-10-01), Masuda
patent: 4988888 (1991-01-01), Hirose et al.
patent: 5051625 (1991-09-01), Ikeda et al.

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