Data output circuit of semiconductor device

Details Data output circuit of semiconductor device Data output circuit of semiconductor device

1991-05-28

1992-03-10

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307445, 307448, 307443, H03K 1716

Patent

active

050952307

ABSTRACT:
A data output circuit with a first and a second input node and an output node has a two-input NAND gate connected to the two input nodes, a two-input NOR gate connected to the two input nodes and a first to a fourth field effect transistor. The first and second transistors are connected in parallel between a power source line and the output node with the gate of the first transistor being connected to an output of the NAND gate and with the gate of the second transistor being connected to the first input node. The third and fourth transistors are connected in parallel between the output node and the ground line with the gate of the third transistor being connected to an output of the NOR gate and with the gate of the fourth transistor being connected to the first input node. The first and second transistors are P-channel MOS transistors and the second and third transistors are N-channel MOS transistors. The data output circuit can produce outputs of four different levels based on combinations of levels of signals applied to the two input nodes.

REFERENCES:
patent: 4779013 (1988-10-01), Tanaka
patent: 4829199 (1989-05-01), Prater

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