Data output buffer with selective bootstrap circuit

Details Data output buffer with selective bootstrap circuit Data output buffer with selective bootstrap circuit

1991-12-26

1993-12-14

Westin, Edward P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307482, 3072968, 307443, 307473, H03K 19092, H03K 1902

Patent

active

052705889

ABSTRACT:
A data output buffer includes an output driving stage having a pair of parallel pull-up transistors and a pull-down transistor, a latch circuit for latching a pair of complementary signals, a second gate for gating the non-inverted output signal of the latch circuit in response to an external output enable signal and then supplying it to the gate of one pull-up transistor of the output driving state, a third gate also for gating the non-inverted output signal of the latch circuit in response to an external output enable signal, and a selective bootstrap circuit for driving the other pull-up transistor of the output driving stage. The output driving stage is driven to an external supply voltage when the external supply voltage is higher than a set voltage, and is driven to a boosted voltage when the external supply voltage is lower than the set voltage, determined by output signals from the second and third gates.

REFERENCES:
patent: 4049979 (1977-09-01), Shieu et al.
patent: 4484092 (1984-11-01), Campbell, Jr.
patent: 5065049 (1991-11-01), Jang
patent: 5128563 (1992-07-01), Hush et al.

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