Data occurrence frequency analyzer

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364717, 377 72, G06F 1536, G06M 110

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active

050974289

ABSTRACT:
An apparatus for counting the number of times that each of a large number of digital data patterns are present on a set of signal lines comprises a plurality of random access memories (RAMs) and a feedback means, arranged to form an array of linear feedback shift registers. The data to be analyzed is applied to the address inputs of the RAMs where it selects one of the linear feedback shift registers in the array. A data-valid signal associated with this data causes the selected linear feedback shift register to increment (or decrement) in its pseudo-random count. After the analysis period is over, the value at each address is read out and translated using a lookup table or other translating means from the pseudo-random code of the linear feedback shift register into a meaningful number. This result may then be displayed; for example, in a histogram. An improved feedback path for the linear feedback shift register avoids hang-up states and the need for initialization. A mux can be used to switch between two alternative feedback paths, allowing the apparatus to operate in a count-up mode or a count-down mode.

REFERENCES:
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patent: 4475237 (1984-10-01), Glasby
patent: 4692897 (1987-09-01), Crabbe
patent: 4774681 (1988-09-01), Frisch
patent: 4860236 (1989-08-01), McLeod et al.
Kerman, A Facility for Analyzing Microprocessor System Performance, 1979, pp. 79-82, IEEE Compler.

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