Data multiplexing apparatus having single external memory

Details Data multiplexing apparatus having single external memory Data multiplexing apparatus having single external memory

2005-03-15

2005-03-15

Hsu, Alpus H. (Department: 2665)

Multiplex communications

Communication techniques for information carried in plural...

Combining or distributing information via time channels

C370S421000

Reexamination Certificate

active

06868096

ABSTRACT:
In a data multiplexing apparatus, a single external memory stores different kinds of transfer data. A header cache memory stores the system header and the header data, and a plurality of data cache memories stores the transfer data. The cache memories are connected via an internal bus to the external memory. A data input circuit sequentially fetches the transfer data from the external memory on a time division basis, so that the transfer data is stored in one of the data cache memories. Also, a system clock signal generation circuit constantly generates a system clock signal indicating the current time. A selector circuit sequentially selects the cache memories and generates a system stream formed by the system header, the header data and the transfer data. In this case, the selector circuit further selects the system clock generation circuit to input the system clock signal to a predetermined position of the system header.

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Japanese Translation of the Korean Office Action dated Dec. 12, 2001 with partial English Translation.

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