Data multiplexing and demultiplexing apparatus capable of simpli

Details Data multiplexing and demultiplexing apparatus capable of simpli Data multiplexing and demultiplexing apparatus capable of simpli

1997-11-21

1999-10-26

Olms, Douglas W.

Multiplex communications

Communication techniques for information carried in plural...

Combining or distributing information via time channels

370535, 370537, 370542, 395891, 341100, 341101, H04J 306, H04J 304

Patent

active

059740558

ABSTRACT:
In a data multiplexing/demultiplexing apparatus including a serial-to-parallel converter, a microprocessor and a memory, a data shift register inputs data from the memory by way of the microprocessor, a correction register stores a shift correction amount on a transmission path of the data shift register. A framing rule register stores a framing rule determined by the microprocessor, a counter, carries out a counting operation in accordance with the framing rule to an address information signal. A look-up table ROM outputs a selector selection signal in accordance with the address information signal, and a data selector distributes output data of the data shift register among a plurality of shift registers in accordance with the selector selection signal. The microprocessor analyzes data separated by the plurality of shift registers, performs a synchronism detecting operation and a protocol determining operation, and determines the framing rule.

REFERENCES:
patent: 3872257 (1975-03-01), Bleickardt et al.
patent: 4035580 (1977-07-01), Dieter et al.
patent: 4977558 (1990-12-01), Iguchi et al.
patent: 5483539 (1996-01-01), Kaufmann
patent: 5537148 (1996-07-01), Fujinami
patent: 5623493 (1997-04-01), Kagemoto

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