Data multiplex transmission system

Multiplex communications – Wide area network – Packet switching

Patent

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Details

370 84, 370105, H04J 300

Patent

active

048602833

ABSTRACT:
A data multiplex transmission system including a data multiplexer, a demultiplex controller and a clock generator for terminal interface is disclosed, in which one block of an error correction code of a variable word length whose rate can be easily matched with the multiplex rate is set into one transmission frame. The multiframes of the least common multiple of the number of multiframes such that the multiplex rate which cannot be matched in one transmission frame is matched are set, thereby allowing the bit stuff reference timing to be integratedly handled. Further, transmission frame header information and control data link are provided, thereby allowing the multiplex transmission to be executed in accordance with a predetermined communication procedure.
This transmission frame can realize the advanced communication by the header information and control data link. Thus, the data multiplex transmission can be performed with a simple construction while keeping the high efficiency and high reliability. Further, the transmission frame pull-in time is reduced by the bit error permission type pattern matching for the multiframe sync bits.

REFERENCES:
patent: 3959595 (1976-05-01), Smith
patent: 4680752 (1987-07-01), Takemura et al.
patent: 4727536 (1988-02-01), Reeves et al.

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