Boots – shoes – and leggings
Patent
1983-06-13
1987-05-12
Williams, Jr., Archie E.
Boots, shoes, and leggings
G06F 300, G06F 1300
Patent
active
046654828
ABSTRACT:
A data processing system includes a central processing unit (CPU), an input/output microprocessor, a main memory and a number of mass storage controllers. A block of information is transferred between one of the mass storage controllers and main memory during data multiplex control (DMC) cycles. The CPU includes registers which store the address of main memory into which the next data byte is written or read from and the range indicating the number of data bytes remaining to be transferred. Prior to a DMC cycle the CPU stores address and range information in a mailbox location in an I/O RAM and the I/O microprocessor transfers that information to channel table locations in the I/O RAM. For a DMC operation, the I/O microprocessor transfers the address and range information to the mailbox location and transfers the mass storage information to the mass storage controller. It signals a CPU interrupt and issues a read or write order to the mass storage controller. The CPU then retrieves the address and range information from the mailbox location and initiates a DMC cycle.
REFERENCES:
patent: 3633169 (1972-01-01), Bickford
patent: 4032898 (1977-06-01), Grigoletti
patent: 4292668 (1981-09-01), Miller et al.
patent: 4293908 (1981-10-01), Bradley et al.
patent: 4313160 (1982-01-01), Kaufman et al.
patent: 4484271 (1984-11-01), Miu et al.
Goss Gary J.
Holtey Thomas O.
Murray, Jr. Thomas L.
Stonier James W.
Grayson George
Honeywell Information Systems Inc.
Niessen William G.
Solakian John S.
Williams Jr. Archie E.
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