Data modem clock extraction circuit

Pulse or digital communications – Spread spectrum – Direct sequence

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375 14, 375 96, 364724, H04L 2503, H04L 706

Patent

active

044556659

ABSTRACT:
A digital timing recovery circuit operative upon digital samples of the input signal to a data receiver provided at the sample rate to produce a clock correction signal at the symbol rate utilizing a digital periodic filter providing a double restrictive bandpass characteristic about the band edge frequencies and outputting to a nonlinear device followed by a digital sampling filter designed to require only addition and subtraction of the nonlinear device outputs.

REFERENCES:
patent: 3020479 (1962-02-01), Logan
patent: 3393308 (1968-07-01), Cope
patent: 3524023 (1970-08-01), Whang
patent: 3921075 (1975-11-01), Denny
patent: 4190896 (1980-02-01), Knowlton
patent: 4203070 (1980-05-01), Bowles et al.
patent: 4344176 (1982-08-01), Qureshi
D. L. Lyon "Envelope-Derived Timing Recovery in QAM and SQAM Systems" IEEE Transactions on Communication, Nov., 1975, pp. 1327-1331.

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