Multiplex communications – Fault recovery – Bypass an inoperative switch or inoperative element of a...
Reexamination Certificate
1998-07-01
2001-10-02
Ngo, Ricky (Department: 2731)
Multiplex communications
Fault recovery
Bypass an inoperative switch or inoperative element of a...
C370S228000
Reexamination Certificate
active
06298040
ABSTRACT:
BACKGROUND OF THE INVENTION
(a) Field of the Invention
The present invention relates to a data link layer processor (DLLP) system for a local exchange system in a communication system and, more particularly, to a DLLP system having a redundancy scheme.
(b) Description of the Related Art
Specification for a DLLP system having an interface for multiplexing a large number of logical links on a physical link is defined in V5.1(ETS300-324), V5.2(ETS300-347), PHI(ETS300-099) in European Technical Standard (ETS), for example. Such a DLLP system generally has a m-for-n redundancy scheme wherein a plurality of (m) spare DLLPs are provided for a plurality of (n) in-service DLLPs.
Conventionally, a DLLP operating for communication in a communication system having a redundant system communicates with a counter device such as a user port while monitoring occurrence of transmission faults in the large number of logical links multiplexed on a transmission channel, and thus it is not possible to switch the channel between the in-service DLLP and the spare DLLP without cutting the data link.
As a switching method for a single physical link is disclosed in JP-B-7(1995)-7992, which used the No. 7 signal link switching system defined by CCITT. In the signal link switching system disclosed therein, signals received from a signal link are connected to a plurality of layer
2
termination circuits through a switching circuit. The layer
2
termination circuit stops receipt of a significant signal unit from the in-service signal link, and the system then reads out a plurality of error correction codes during the stop of the receipt, writes the error correction codes in the spare layer
2
termination circuit, re-starts the operation for service, and finally switch between the layer
2
termination circuits without affecting the operation of the counter device then communicating with the in-service DLLP.
In the system as described above, for switching the single physical link without affecting the communication of the data links, it is necessary to stop all communications on the multiplexed logical links, copy the states of the logical links at a high speed, and finally restart the operation. The device for copying the state of the logical links at a high speed necessitates a larger scale for the DLLP system having a m-for-n redundancy scheme. That is, it is difficult to fabricate a DLLP system with a moderate size having a m-for-n redundancy scheme and capable of switching a physical link without cutting the multiplexed data link.
There is another problem in switching the physical link in that it takes a long time to restart the operation after switching and stopping of a large number of logical links.
It is therefore an object of the present invention to provide a a DLLP system having a m-for-n redundancy scheme for a multiplexed logical links, and having a simple configuration and a moderate size.
It is another object of the present invention to provide a switching method for a DLLP system which is capable of switching a physical link between an in-service DLLP and a spare DLLP with a least stop of transmission and substantially without being affected by the number of data links multiplexed on the physical link.
In accordance with the present invention, a data link layer processing (DLLP) system is provided which comprises a physical link connected to plurality of user ports each providing a packet data on the physical link, an access network system having a first interface for multiplexing logical links on the physical link, a local exchange system having a second interface for layer
2
processing the packet data supplied through the logical links, and a transmission line for coupling the access network system and the local exchange system for implementing a part of the logical link,
at least one of the first and second interfaces comprising a plurality of DLLPs including an in-service DLLP and a spare DLLP, a switch for switching between the in-service DLLP and the spare DLLP for connection with the transmission line, the switch having a multi-coupling function for coupling the transmission line to both the in-service DLLP and the spare DLLP, the in service DLLP transfers the logical links to the spare DLLP consecutively (or one by one) while frame multiplexing the packet data from the spare DLLP with data from the in-service DLLP, the switch decoupling the in service DLLP from the transmission line to leave the spare DLLP coupled with the transmission line for transmission of data on the plurality of logical links.
The multiplexing may be performed by a separate frame multiplexer for the frame multiplexing or may be implemented by a controller which controls the in-service DLLP to operate for frame multiplexing. In case of the latter, each DLLP may have a plurality of high-level data link control (HDLC) circuits, one of which is implemented as a detour data receiving circuit for receiving data from the spare DLLP to transmit the received data to the in-service HDLC coupled with the logical link during the transfer of the logical links. Alternatively, each DLLP may have a frame multiplexer for implementing the detour data receiving circuit and frame multiplexing.
In the transfer of one of the logical links (subject logical link) from the in-service DLLP to the spare DLLP, the following procedure may be used: the in-service DLLP first stops data on the subject logical link, the controller reads data relating to the subject logical link now stopped and the sequential number of the subject logical link, the controller writes the read data and the sequential number in the spare DLLP, and the spare DLLP then operates for the subject data link.
The in-service DLLP may transmit a RNR (receive not ready) signal on the subject logical link during the transfer of the subject logical link from the in-service DLLP to the spare DLLP. Alternatively, the controller may control the spare DLLP to transmit a RR (receive ready) signal after the switching is completed.
In case of the provision of the separate frame multiplexer, the separate frame multiplexer may be controlled by a controller to receive the data of the connection information of the logical data links from the in-service DLLP.
In accordance with the DLLP system of the present invention, the in-service DLLP is switched to the spare DLLP substantially without stopping the transmission from the user ports or other counter devices through the physical link, and the recovery from the switching is performed with a reduced time length.
The above and other objects, features and advantages of the present invention will be more apparent from the following description, referring to the accompanying drawings.
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patent: 5581542 (1996-12-01), Kato et al.
patent: 5712847 (1998-01-01), Hata
patent: 5715237 (1998-02-01), Akiyoshi
patent: 5870382 (1999-02-01), Tounai et al.
patent: 5909427 (1999-06-01), Manning et al.
patent: 5959972 (1999-09-01), Hamani
patent: 6034943 (2000-03-01), Kwon
patent: 6075767 (2000-06-01), Sakamoto et al.
patent: 62-131652 (1987-06-01), None
patent: 7-23108 (1995-01-01), None
patent: 77992 (1995-07-01), None
Japanese Office Action issued Jan. 5, 2000 in a related application with English translation of relevant portions.
Aoyagi Masato
Okurano Tsutomu
Shimizu Tomoyoshi
Yamamura Haruhiko
NEC Corporation
Ngo Ricky
Ostrolenk Faber Gerb & Soffen, LLP
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