Data latch circuit with improved data write control function

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307279, 307291, 36518905, 365203, 365205, H03K 3356, H03K 3013, H03K 1704, H03K 1901

Patent

active

049374796

ABSTRACT:
A latch circuit includes a current source, and a flip-flop amplifier circuit having a pair of first and second input terminals for comparing a reference voltage and an external input voltage with each other and amplifying the voltage difference therebetween in response to inputting of an activating signal. A first transistor has a source terminal, a drain terminal connected to the first input terminal of the flip-flop amplification circuit, and a gate terminal receptive of the external input voltage. A second transistor has a source terminal connected to the source terminal of the first transistor, a drain terminal connected to the second input terminal of the flip-flop amplification circuit, and a gate terminal receptive of the reference voltage. A pair of gate elements are connected in series between the sources of the first and second transistors and the current source, and operate after the completion of amplification of the voltage difference in the flip-flop amplifier circuit for cutting off a drain current flowing through the first and second transistors so as to enable the flip-flop amplifier circuit to latch the external input voltage.

REFERENCES:
patent: 4417163 (1983-11-01), Otsuki et al.
patent: 4442365 (1984-04-01), Nagami
patent: 4458337 (1984-07-01), Takemae et al.
patent: 4542306 (1985-09-01), Ikeda
patent: 4785206 (1988-11-01), Hoshi

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