Data latch circuit with a phase selector

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Particular stable state circuit

Reexamination Certificate

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Details

C327S012000

Reexamination Certificate

active

07830190

ABSTRACT:
The present invention provides a data latch circuit. The data latch circuit includes a first data latch unit, a second data latch unit, a third data latch unit, and a phase selector. The first data latch unit is used for latching a first input data according to a first clock signal and outputting a first output data. The second data latch unit is used for latching the first output data according to a second clock signal and outputting a second output data. The third data latch unit is used for latching the second output data according to a third clock signal and outputting an output data. The phase selector is coupled to the second data latch unit for generating the second clock signal to the second data latch unit according to phase relation between the first clock signal and the third clock signal.

REFERENCES:
patent: 6486721 (2002-11-01), Greenstreet et al.
patent: 6653875 (2003-11-01), Partsch et al.
patent: 6710605 (2004-03-01), Tang et al.
patent: 7323946 (2008-01-01), Seefeldt et al.
patent: 7423919 (2008-09-01), Lin
patent: 7471131 (2008-12-01), Liu et al.
patent: 2004/0124899 (2004-07-01), Cavazos et al.
Cheng-Chung Hsu, “Phase Selector for Data Transmitting Device”, U.S. Appl. No. 11/737,758, filed Apr. 20, 2007.

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