Data input/output circuit for a digital signal processing system

Coded data generation or conversion – Digital code to digital code converters – Programmable structure

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Details

341 50, 377 70, 377 64, H03M 700

Patent

active

054899010

ABSTRACT:
A data input/output circuit includes a 32-bit reversible shift register (1) which includes four 8-bit reversible shift registers (2-5). Input gate circuits (6, 7) selectively apply data being inputted in a bit-serial fashion from an external to the 8-bit reversible shift registers (3, 4), and output gate circuits (8-12) selectively output data being stored in arbitrary stages of the 32-bit reversible shift register (1) in a bit-serial fashion. Input latches (13-15) and output latches (16-18) each of which is an 8-bit latch are connected to the respective 8-bit reversible shift registers (2-4) and a data bus (19). The input latches (13-15) hold the data being stored in the 8-bit reversible shift registers (2-4) and send the same onto the data bus (19) in a bit-parallel fashion, and the output latches (16-18) hold the data being sent from the data bus (19) and preset the same into the 8-bit reversible shift registers (2-4) in a bit-parallel fashion.

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