Data input circuit with digital phase locked loop

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360 51, 375119, 375120, G06F 1500, G06F 300, H03D 324

Patent

active

047808446

ABSTRACT:
A digital phase locked loop circuit for reading input data transmitted from storage media. Counter and adder components establish the time of arrival of input data bits. Inspection windows are established having durations and start/stop times that can be adjusted by correction signals so that subsequent data bits will be received in the middle of the inspection windows. Correction signals to the counter and adder components compensate for variations in the phase and frequency of input data transmitted from storage media.

REFERENCES:
patent: 4357707 (1982-11-01), Delury
patent: 4550391 (1985-10-01), Chung et al.
patent: 4618898 (1986-10-01), Young et al.
patent: 4633488 (1986-12-01), Shaw
patent: 4672482 (1987-06-01), Troletti
patent: 4672597 (1987-06-01), Yamazaki

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