Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2006-05-23
2006-05-23
Le, Thong Q. (Department: 2827)
Static information storage and retrieval
Addressing
Sync/clocking
C365S193000, C365S194000
Reexamination Certificate
active
07050352
ABSTRACT:
Provided is directed to a data input apparatus and a method of DDR SDRAM which can improve reliability of a circuit operation by transferring data inputted after applying a data strobe signal DQS to an input/output bus GIO by a exact timing, by means of correctly arranging the data strobe signal DQS and a data input strobe pulse dinstbp regardless of time difference of inputting the data strobe signal DQS after a write command, in response to generating a data input strobe pulse dinstbp used to load data to the input/output bus GIO as a data strobe pulse dsp identical to the data strobe signal DQS.
REFERENCES:
patent: 6324119 (2001-11-01), Kim
patent: 6636446 (2003-10-01), Lee et al.
patent: 6671787 (2003-12-01), Kanda et al.
patent: 6707723 (2004-03-01), Jeong
Hynix / Semiconductor Inc.
Le Thong Q.
Marshall & Gerstein & Borun LLP
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