Data holding circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude

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Details

327 91, G11C 2702

Patent

active

059492589

ABSTRACT:
A data holding circuit is provided that reduces a setup time and hold time when a data is inputted to effectively transmit output data. The data holding circuit includes a latch unit that samples and holds input data, a delay unit that delays a control signal, and a three-phase buffer. The three-phase buffer is enabled based on a delayed control signal from the delay unit to hold data from the latch unit LAT and to transmit output data.

REFERENCES:
patent: 5144628 (1992-09-01), Sekiguchi
patent: 5231313 (1993-07-01), Itoh
patent: 5557225 (1996-09-01), Denham et al.
patent: 5559753 (1996-09-01), Kocis
patent: 5646553 (1997-07-01), Mitchell et al.
patent: 5656959 (1997-08-01), Chang et al.

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