Data frame switch

Details Data frame switch Data frame switch

1998-01-14

2001-02-27

Olms, Douglas (Department: 2661)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S386000, C370S395430, C370S400000

Reexamination Certificate

active

06195350

ABSTRACT:

The invention relates to a data frame switch, in particular for the purpose of implementing a distributor. Such a distributor may also include access ports for asynchronous transfer mode (ATM) cells.
BACKGROUND OF THE INVENTION
A switch must set up connections between its access ports. In the special case of a distributor, these connections are semipermanent. A switch is modular in structure. The access ports are generally distributed over a plurality of electronic circuit cards referred to as “couplers”. In general, it is possible to add coupler cards in order to increase the capacity of a switch.
Conventionally, couplers are interconnected by means of a bus for the purpose of transferring data from one coupler to another. Possibly, a redundant second bus is provided to remedy failure of the first bus.
Another architecture is known, in particular from French patent application No. 2 665 314, in which each coupler is connected via an independent both-way link to each of the other couplers. in other words, there is one link for each combination of two couplers. Those links are implemented by means of a backplane having a large number of layers. Each coupler may be backed-up by another coupler in the event of failure. Since that architecture does not have a bus that is common to all of the couplers, it avoids any possibility of blocking due to excess traffic in any given direction, and it also avoids any possibility of the entire switch being blocked by one of the couplers operating wrongly. The present invention relates more particularly to that type of switch.
In that type of switch, forwarding from one access port to another takes place over a path that passes via two couplers. When a coupler is added, when a coupler is removed, and when a coupler breaks down partially or completely, it is necessary for all of the possible paths to be determined anew. In order to enable the paths to be determined in real time, it is necessary for path determination to be performed automatically, i.e. without requiring a human operator to intervene. Also, it is desirable for the means used to be capable of being protected against the possibility of failure in a resource that is used for path determination.
OBJECT AND SUMMARY OF THE INVENTION
The object of the invention is to propose means enabling paths to be determined automatically, and ensuring:
good performance in relaying frames; and
security of signalling interchanges which take place prior to a link being set up to transfer data by relaying frames.
The invention provides a data frame switch comprising at least a first subassembly comprising:
a plurality of “medium speed” couplers each comprising:
at least one functional entity for line termination coupled to at least one input/output for data frames; and
first centralization means for centralizing information in the coupler concerning the states of all of the line termination functional entities situated in the coupler;
links such that each medium speed coupler is connected directly to each of the other medium speed couplers by at least one link specific to the coupler;
second centralization means common to the switch as a whole:
to centralize for the switch all of the information centralized by the first centralization means in each medium speed coupler; and
to establish a first routing table listing all of the active paths existing between functional entities for terminating frame-relaying lines;
wherein the line termination functional entities, the first centralization means, and the second centralization means all comprise software entities, each designated by a predetermined identifier, and all comprise processors designated by respective processor identifiers determined by software identities as a function of the current configuration of the switch;
and wherein for communication between two software entities, each software entity has an address comprising both the identifier of the processor executing said entity and the identifier of said entity.
This switch automatically makes a new determination of which paths are possible from the links suitable for constituting paths for each combination of two access ports, and it does so each time the configuration of the switch is modified since the first and second centralization means serve to collect in a single point all of the information necessary for determining all of the paths. The routing table can then be broadcast to all of the entities that may require it. Also, processor identification is automatic because said identifiers are determined dynamically as a function of the current configuration of the switch. The switch thus has the advantage of enabling the configuration of the switch to be modified merely by adding cards: there is no need to interrupt operation of the switch, and the user does not have to give the switch an identifier for each additional processor.
In a particular embodiment, each processor identifier is made up of a chassis number, a card location number, and a logical number.
In a particular embodiment, communication between two software entities may be of a quality selected from two qualities:
communication that is not secure but that provides maximum performance during a data transfer stage; or
communication that is secure and that is adapted to interchanges leading up to the data transfer stage.
In a particular embodiment, said first subassembly further comprises:
a plurality of “high speed” couplers each including at least one functional entity for terminating an asynchronous transfer mode (ATM) line;
at least one gateway having:
at least a first input/output coupled to at least one line termination functional entity for ATM cells; and
a plurality of data frame inputs/outputs respectively and directly connected to each medium speed coupler via links such that each medium speed coupler is connected directly to one of the inputs/outputs of the gateway via at least one link specific to the coupler; and
an ATM switching matrix connected to an input/output of each high speed coupler and to the first input/output of the gateway to set up ATM connections;
and the second centralization means initialize and update a second table referred to as a “common ATM routing table”, containing the references of all the ATM connections set up by said matrix in said first subassembly.
This embodiment also makes it possible to determine in real time paths constituted by ATM links that enable a plurality of chassis to be interconnected, each chassis containing a subassembly of the switch of the invention.
In a particular embodiment, a switch includes at least one second subassembly comprising:
a plurality of “medium speed” couplers each comprising at least one line termination functional entity coupled to at least one input/output for data frames;
a plurality of “high speed” couplers each comprising at least one ATM line termination functional entity, with at least one of the high speed couplers of the second subassembly being connected by an ATM line to a high speed coupler of the first subassembly;
at least one gateway having:
at least a first input/output coupled to at least one line termination functional entity for ATM cells; and
a plurality of data frame inputs/outputs connected respectively and directly to each medium speed coupler via links such that each medium speed coupler is connected directly to one of the inputs/outputs of the gateway via at least link specific to said coupler; and
links such that each coupler of the second subassembly is connected directly to each of the other couplers of the second subassembly via at least one link specific to the coupler;
and the second centralization means of the first subassembly also:
centralize for the switch all of the information centralized by the first centralization means of all of the medium speed couplers;
establish a first routing table listing all of the active paths existing in the second subassembly between line termination functional entities for relaying frames; and
initialize and update a common ATM routing table containing the references of all of the ATM c

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