Boots – shoes – and leggings
Patent
1983-08-25
1986-05-27
Zache, Raulfe B.
Boots, shoes, and leggings
G06F 1300, G06F 700, G06F 938, G06F 300
Patent
active
045919798
ABSTRACT:
A data processing apparatus having a dataflow architecture includes an addressor module, an operational module and a memory module, and data to be processed is accompanied by a command and is applied to the respective module through a uni-directional bus. The addressor module and the operational module are integrated within a common hardware circuit having a feedback loop. A normal operation (an arithmetic and logic operation) is executed by the common hardware circuit by using only the uni-directional bus, while an address generating operation is executed by the common hardware circuit by using the uni-directional bus and the feedback loop.
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Byte, vol. 10, No. 12, Nov. 1985, (McGraw-Hill), "The yPD7281 Processor", by Tom Jeffery, pp. 237-240.
NEC Corporation
Niessen William G.
Zache Raulfe B.
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