Data flow processor with next destination node determination

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395375, 395800, 364DIG1, 36423222, G06F 1582

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active

052187063

ABSTRACT:
A data flow processor which is so constructed that the destination node number in a program memory is stored at a relative address from, for example, a stored address of the present instruction, and a storing address for the next instruction is obtained by adding the relative address of the next instruction to the address of the present instruction. Hence, an amount of data of storing address of instruction to be executed next executed and included in the respective instructions is reduced, whereby an amount of hardware at the program memory is reduced and the memory access time is contracted.

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Ralston et al, "The Encyclopedia of Computer Science & Engineering", 1983 p. 17.
"An Architecture of a Data Flow Machine and Its Evaluation" pp. 486-490, T. Shimada et al. ('84).

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