Data flow management method for CDPD demodulator operating witho

Pulse or digital communications – Transceivers – Modems

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375324, 375340, 375372, 341 61, H04L 2536

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active

058286985

ABSTRACT:
An efficient and power-saving method of converting serial in-phase (I) and quadrature-phase (Q) symbols at the IS-54 standard symbol rate, to time-aligned IQ pairs at the CDPD standard symbol rate. A FIFO buffer stores the serial in-phase (I) and quadrature-phase (Q) symbols at the IS-54 standard symbol rate. A DSP performs CDPD demodulation by reading time-aligned IQ pairs directly from the FIFO buffer, even though the FIFO buffer contains serial in-phase (I) and quadrature-phase (Q) symbols at the IS-54 standard symbol rate. This is accomplished by performing a rate conversion method between the DSP pointer and the FIFO buffer. The rate conversion combines, symbol rate conversion, sample timing alignment, and sign corrections in one calculation, resulting in an efficient method of generating the desired time-aligned IQ pairs at the CDPD symbol rate. A look-up table is used for several of the variables in the rate conversion calculation. The present invention further provides a method of mimicking the appropriate CDPD sample clock timing by adjusting the total number of FIFO samples to be read during steady state demodulation.

REFERENCES:
patent: 4825448 (1989-04-01), Critchlow et al.
patent: 5461426 (1995-10-01), Limberg et al.
patent: 5486784 (1996-01-01), Eriksson
patent: 5493589 (1996-02-01), Ibenthal

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