Data flow integrated circuit architecture

Electrical computers and digital processing systems: processing – Processing architecture – Data driven or demand driven processor

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712 34, G06F 1300

Patent

active

061450731

ABSTRACT:
Pre-designed and verified data-driven hardware cores (intellectual property, functional blocks) are assembled to generate large systems on a single chip. Token transfer between cores is achieved upon synchronous assertion, over dedicated connections, of a one-bit ready signal by the transmitter and a one-bit request signal by the receiver. The ready-request signal handshake is necessary and sufficient for token transfer. There are no combinational paths through the cores, and no latches or master controller are used. The architecture and interface allow a significant simplification in the design and verification of large systems integrated on a single chip.

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Madisetti et al., "Interface Design for Core-Based Systems," IEEE Design & Test of Computers, p. 42-51, Oct.-Dec. 1997.
Rincon et al., "Core Design and System-on-a-Chip Integration," IEEE Design & Test of Computers, p. 26-35, Oct.-Dec. 1997.

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