Data error correcting method for digital signal frames and appar

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371 373, 370333, 370331, 370332, 395525, H03M13/00

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059057416

ABSTRACT:
Received data is applied in units of blocks to an error correcting unit and a data holding unit. If the error correcting unit normally performs error correction, the output from the error correcting unit is stored in a frame buffer. If the error correcting unit does not normally perform error correction, the data in the data holding unit is stored in the frame buffer. In this manner the first error correction processing is performed. Bit data is sequentially read out in units of bits from each block stored in the frame buffer, subjected to the second error correction processing, and returned to the frame buffer. The third error correction processing is further performed for the data sequentially output in units of blocks from the frame buffer.

REFERENCES:
patent: 4672612 (1987-06-01), Shishikura et al.
patent: 5734853 (1998-03-01), Hendricks et al.
M. Suka et al., "Development of DARC Decoding LSI for High-Speed FM Subcarrier System", pp. 570-577, IEEE Transactions on Consumer Electronics, vol. 40, No. 3, Aug. 1994.
Osamu Yamada et al., "Development of an Error-Correcting Method for Coded Transmission Teletext", NHK. 1985, pp. 38-67.

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