Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2000-01-19
2002-12-03
Chang, Kent (Department: 2673)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S098000, C345S100000
Reexamination Certificate
active
06489943
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relate to a data driver for use in a liquid crystal display and, more particularly, to a ramp signal application type of data driver.
2. Description of the Related Art
FIG. 1
is a block diagram illustrating a construction of a conventional data driver.
FIGS. 2A
to
2
C are timing diagrams illustrating output states at point. A, B and C of FIG.
1
. Referring to
FIG. 1
, the conventional data driver includes a plurality of registers
1
, a plurality of counters
2
and a plurality of pass transistors
3
. Digital data is sequentially loaded into the plurality of registers
1
. After the digital data is loaded into a register it is transferred to a corresponding counter
2
.
When a load signal is applied to the lead line of each of the counters
2
, the counters
2
each set a corresponding digital data count value and count down from the digital data count value according to an input clock signal. The counters
2
execute a logical ORing operation on signals output from a plurality of internal flip-flops, to thereby produce a pulse width modulated output. Output digital bits from the counters
2
are applied to corresponding pass transistors
3
for producing ramp signal for producing ramp signal lines.
When a load signal is applied to the lead line of each of the counters
2
, the counters
2
each set a corresponding digital data count value and count down from the digital data count value according to an input clock signal. The counters
2
execute a logical Oring operation on signals output from a plurality of internal flip-flops, to thereby produce a pulse width modulated output. Output digital bits from the counters
2
are applied to corresponding pass transistors
3
for producing ramp signal lines.
When the output digital bits from the counters
2
become high, “H” level, the corresponding pass transistors
3
are turned on, and the ramp signals are applied to data lines.
On the other hand, when the output signals from the counters
2
become low, “L” level, the corresponding pass transistors
3
are turned off and the ramp voltage on the data lines is unchanged. The ramp voltage determines a brightness of picture elements in a liquid crystal display.
FIG. 2A
is a timing diagram showing output waveforms of the applied ramp signal.
FIG. 2B
is a timing diagram showing output waveforms of a counter
2
in the case of digital data “000010” and “111101”.
FIG. 2C
is a timing diagram showing output waveforms of a voltage or responding to a transformed ramp signal of
FIG. 2A
in response to digital data output of the counter
2
of FIG.
2
B.
FIG. 3
is a circuit diagram of the counter
2
of
FIG. 1. A
load signal is inverted and applied to “OR” gate
300
, digital data, data A-D, is supplied to each terminal of the counters
2
through “AND” gates
310
. Next, the counters
2
are each set to a corresponding data count value of the applied digital data. After the data loading is completed, a clock signal is applied to flip-flops
312
-
318
in counter
2
. The counters
2
respectively countdown by 1 from the digital data count value, and when the digital data value is “0000”, the counter is reset and halted. Then, OR Gate
320
performs a logical OR operation on the flip-flop outputs Q
A
, Q
B
, Q
C
and Q
D
. The counters
2
respectively output the OR-ed result as an output signal.
Accordingly, the conventional data driver for use in a liquid crystal display requires counters with complicated circuit construction.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a data driver for use in a liquid crystal display that has a simplified structure.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, there is provided a data driver in a liquid crystal display, the data driver including a plurality of data lines; a plurality of shift registers for sequentially outputting a sample control signal; a plurality of sample and hold circuits, connected to each of the data lines, for sampling data on corresponding data lines in response to the sample control signal; and a plurality of timing control parts for receiving sampled data from the sample and hold circuits and for performing a logical operation on the sample data.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 5166670 (1992-11-01), Takeda et al.
patent: 5266936 (1993-11-01), Saitoh
patent: 5434899 (1995-07-01), Huq et al.
patent: 5477234 (1995-12-01), Suzuki et al.
patent: 5583535 (1996-12-01), Takarada et al.
patent: 5796379 (1998-08-01), Enomoto et al.
Chang Kent
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
LG Electronics Inc.
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