Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Patent
1995-10-13
1999-01-05
Brier, Jeffery
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
345 96, 345103, G09G 336
Patent
active
058568166
ABSTRACT:
A data driver includes a first signal generating circuit for externally producing a start signal; a second signal generating circuit for externally producing a first clock signal; a third signal generating circuit for externally producing a load signal; a generator externally generating a source video signal having a frequency; and a single integrated circuit including: an m-bit register circuit for receiving the start signal corresponding to the first clock signal and outputting a latch clock signal, where m is an integer; a data latch circuit for latching and outputting at least two sets of three video signals corresponding to the source video signal, the data latch circuit receiving all of the video signals simultaneously, each of the video signals having n-bits of data, where n is an integer; a line latch circuit for latching the video signals from the data latch circuit corresponding to the latch clock signal from the shift register, the line latch circuit storing and outputting the video signal according to the load signal of the third signal generation circuit; a digital to analog converter circuit for converting the video signal from the line latch to an analog signal; and a data output circuit for outputting the analog signal from the digital to analog converter, where a frequency of the first clock signal is reduced by the number of sets of the three video signals as compared to a frequency of the source video signal.
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Brier Jeffery
LG Electronics Inc.
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