Data driven processors system for adaptively configuring width o

Details Data driven processors system for adaptively configuring width o Data driven processors system for adaptively configuring width o

1994-06-24

1995-06-27

Lee, Thomas C.

Boots, shoes, and leggings

395400, 364DIG1, 3649611, 36423222, 3642612, G06F 1576, G06F 1582

Patent

active

054288126

ABSTRACT:
A destination field of a data packet to be processed by a data driven type processor includes a field for storing a processor number for specifying a processor by which the data packet is to be processed and a field for storing a node number for addressing a memory space wherein a data flow program to be executed us stored. In a case of structuring one system by coupling a plurality of such data driven type processors, a minimum bit width of the above-described processor number field is determined according to the number of data driven type processors and all fields but the processor number field of the destination field are allotted to the above-described node number field. As a result, the node number field is always allotted a maximum bit width according to the number of data driven type processors constituting the system, so that a memory space allowing the above-described addressing is constantly made largest, in other words, an executable program capacity in each data driven type processor and the system is always maintained at a maximum.

REFERENCES:
patent: 4156910 (1979-05-01), Barton et al.
patent: 4953083 (1990-08-01), Takata et al.
patent: 4965715 (1990-10-01), Yoshida
patent: 4985895 (1991-01-01), Pelkey
patent: 5093919 (1992-03-01), Yoshida et al.
patent: 5125097 (1992-06-01), Okamoto et al.
patent: 5297144 (1994-03-01), Gilbert et al.

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