Electrical computers and digital processing systems: processing – Processing architecture – Data driven or demand driven processor
Reexamination Certificate
2005-09-06
2005-09-06
Tsai, Henry W. H. (Department: 2183)
Electrical computers and digital processing systems: processing
Processing architecture
Data driven or demand driven processor
C712S201000
Reexamination Certificate
active
06941448
ABSTRACT:
When a prescribed operation is performed on 1024-bit multiple-precision data in a data-driven processor, the multiple-precision data is treated as a plurality of single-precision data obtained by dividing the multiple-precision data by every 32 bits in accordance with the memory word length of an accumulation memory, and a group of 32 memory words each having 32 bits of the accumulation memory is treated as the multiple-precision data. Accordingly, in the data-driven processor, a usual memory region can serve as an accumulator for multiple-precision data without having to provide any accumulator dedicated to multiple-precision data in the data-driven processor. In addition, since the multiple-precision data is divided into independent single-precision data each having 32 bits, operations for all data can be performed concurrently. Thus, a parallel processing capability of the data-driven processor can be maximized.
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patent: 5872991 (1999-02-01), Okamoto et al.
Smith, David M., “Algorithm 786: multiple-precision complex arithmetic and functions” Dec. 1998, ACM Transactions on Mathematical Software (TOMS), vol. 24 Issue 4.
Birch & Stewart Kolasch & Birch, LLP
Sharp Kabushiki Kaisha
Tsai Henry W. H.
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