Data-driven processor having an internal tag-generating system f

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364DIG1, 3642318, 3642513, 3642526, 3642531, 3642551, 3642592, 36423222, 36493111, 3649332, 3649335, 3649337, 3649427, 3649462, 3649472, 3649556, 3649561, 3649583, 3649602, G06F 932, G06F 906

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051174898

ABSTRACT:
A data-driven processor which has a packet assembling unit to add a tag information to the sequentially inputted data when the input data has no tag information, such as destination address or the like, thereby enabling the data to be inputted without using an external circuit, such as a host processor, and improving the data input rate and which also has a packet outputting and rearranging unit for rearranging an output packet stream in a predetermined order to thereby output the data information only, so that it is possible that the data is outputted without any external circuit, such as a host processor, the output rate is improved and the data output is executed in a predetermined order.

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Matsamoto et al., "A Data Flow Processor Aiming at the Image Processing Field", NikkeI Electronics, No. 340, pp. 181-218, Apr. 9, 1984.
Gaudiot, Jean-Luc, "Structure Handling in Data-Flow Systems", IEEE Transactions of Computers, vol. C-35, No. 6, Jun. 1986, pp. 489-502.

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