Data driven information processor capable of internally...

Electrical computers and digital processing systems: processing – Processing architecture – Data driven or demand driven processor

Reexamination Certificate

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Details

C712S026000, C712S201000, C713S400000, C713S501000

Reexamination Certificate

active

06954843

ABSTRACT:
A packet generation unit divides a plurality of generated clocks to generate clocks with different frequencies, selects any of the frequencies, sets destination information and data depending on a selected clock rate and generates a data packet that stores the setting result. An input/output control unit taken the data packet generated by the packet generation unit and sends it to a program storage unit or a data memory interface unit according to the destination information. As a result, information can be internally processed in a predetermined frequency without depending on an outside clock. When the outside clock is slow, information can be internally processed in a higher-rate frequency. On the contrary, when the outside clock is too fast to internally process information, information can be internally processed in a lower-rate frequency to secure a processing time.

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patent: 5369774 (1994-11-01), Hatakeyama
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patent: 5794065 (1998-08-01), Hatakeyama et al.
patent: 6373410 (2002-04-01), Ishikura et al.
patent: 06-004393 (1994-01-01), None

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