Data display arrangements

Communications: electrical – Land vehicle alarms or indicators – Internal alarm or indicator responsive to a condition of the...

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Details

340735, 340721, 340790, G09G 114

Patent

active

046723714

ABSTRACT:
A character memory of a data display arrangement is divided into a plurality of separate memory sections which are available to provide characters for display only for respective sub-areas of a display screen. The invention is especially suited to providing high resolution character-based displays using so-called dynamically redefinable characters sets. A memory map MM containing the memory sections is addressed by a counter COU. A latch L2 initially sets the counter COU to the address of the first memory section. During each line scanning period a .div.2 divider DV is responsive to character column pulses CP to step the counter COU to address a new memory section address evey second character position. At the end of each line scanning period line pulses LP reset the counter COU to the first memory section address. In a modification, the connections of the address bus between the counter and the memory map are altered so that the addresses as actually applied to the memory sections are only changed every second (or fourth) character position so that less memory is needed.

REFERENCES:
patent: 4329710 (1982-05-01), Taylor
patent: 4439761 (1984-03-01), Fleming et al.
patent: 4451825 (1984-05-01), Hall et al.
patent: 4485378 (1984-11-01), Matsui et al.

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