Pulse or digital communications – Receivers – Interference or noise reduction
Reexamination Certificate
1998-10-07
2002-06-11
Corrielus, Jean (Department: 2631)
Pulse or digital communications
Receivers
Interference or noise reduction
C360S051000
Reexamination Certificate
active
06404831
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to data detection with improved reliability using a digital filter detector, and in particular to data detection using a digital filter matched to the data to be detected.
BACKGROUND OF THE INVENTION
In digital magnetic detection, the signal is sampled every bit period, and each sample is detected as a binary symbol. Traditionally, greater data transfer reliability is achieved by adding redundancy to the data. For example, if the same byte is repeated three times, it will be detected correctly, by majority vote, if just two of the three bytes are error free.
Data reliability is always important, no matter what the data being detected. However, the reliability of certain data is of even greater importance. For example, the detection of the start of a record, on a magnetic tape, or a sector address, on a magnetic disk drive, is crucial to the detection of the data in the record or sector. The beginning of the record is marked by a START or SYNCHRONIZATION word, which must be detected much more reliably than is necessary for the remaining data. Errors in the remaining data can be corrected by error correction codes, but only if the start of the record is accurately detected. Similarly, when a seek is performed for a disk sector, an error in the sector address prevents finding of the sector.
Conventional schemes for improving the reliability of start of record words or sector addresses involve assigning redundant bits to the start word or sector address. However, the reliability of conventional schemes is dependent upon the limitations of the detection system. For example, a partial response maximum likelihood (PRML) detector will fail if the signal amplitude is reduced by half, no matter how much redundancy is used in the data. A need arises for a technique by which the reliability of detection of important data can be improved to provide better immunity to signal dropout and noise, with reduced data redundancy.
SUMMARY OF THE INVENTION
The present invention is a data detection channel with improved detection reliability and better immunity to signal dropout and noise, that has reduced data redundancy. The data detection channel includes a preamp/filter, a sample/quantizer, an equalizer, a timing recovery circuit and a digital detection filter. The preamp/filter is operable to receive an analog signal representing digital data and output an amplified and filtered analog signal. The sample/quantizer is coupled to the amplified and filtered analog signal and is operable to sample and quantize the analog signal to form a digital sample stream. The equalizer is coupled to the digital sample stream and is operable to equalize the digital sample stream to form a channel data stream comprising a sequence of channel data samples. The timing recovery circuit is coupled to the channel data stream and is operable to recover timing information to form a sampling clock. The digital detection filter is coupled to the channel data stream and the sampling clock and is operable to detect and output the digital data.
The analog signal represents a digital signal comprising a plurality of symbols, each symbol comprising a sequence of values, each symbol representing a unit of digital data. The digital detection filter includes a finite impulse response filter, a synchronization and windowing device and a data detection circuit. The finite impulse response filter has a plurality of coefficients and stores a plurality of channel data samples. On each cycle of the sampling clock, the finite impulse response filter is operable to input and store a channel data sample and output a sum signal representing a sum of each product of each coefficient multiplied by a corresponding stored channel data sample. The synchronization and windowing device is operable to receive the sum signal each sampling clock cycle and output the sum signal, if it corresponds to a symbol. The data detection circuit is operable to receive a sum signal that corresponds to a symbol and output digital data represented by the symbol.
In one embodiment of the present invention, the finite impulse response filter has a number of coefficients equal to a number of values of a symbol. In this embodiment, the coefficients are matched to a sequence of values of a symbol.
In another embodiment of the present invention, the finite impulse response filter has a number of coefficients fewer than a number of values of a symbol. In this embodiment, the coefficients are matched to a portion of a sequence of values of a symbol.
In another embodiment of the present invention, the finite impulse response filter has a number of coefficients greater than a number of values of a symbol. In this embodiment, the coefficients are matched to a sequence of values including a symbol.
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Corrielus Jean
International Business Machines Corp.
Morgan & Finnegan , LLP
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