Data detecting apparatus using an over sampling and an interpola

Pulse or digital communications – Receivers – Particular pulse demodulator or detector

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3647241, H03D 100

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active

054815681

ABSTRACT:
A data detecting apparatus for detecting desired data from a digital signal comprising a first sampling circuit for sampling the digital signal to output samples, an interpolating circuit for interpolating signal values between the samples outputted from the first sampling circuit, and a second sampling circuit for extracting those signal values interpolated by the interpolating circuit which match a phase of a point at which the desired data exists. This constitution allows to implement all blocks making up the data detecting apparatus with digital signal processing circuits synchronously operating on the a clock, detecting the reproduced signal data without being affected by jitters contained in reproduced signals coming from a channel. The constitution also makes it possible to form on a single LSI chip such circuits including the data detecting apparatus, an ECC decoder, a controller, and an interface circuit as conventionally formed on discrete chips. This permits a compact implementation of an entire apparatus and reduces its production cost. Further, this constitution facilitates the design and test for implementing the embodiment on large scale integrations and eliminates the necessity for externally attached analog parts, making the implementation free of adjustment and less susceptible to aging.

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