Data decoding circuit, voltage-controlled oscillation circuit, d

Pulse or digital communications – Systems using alternating or pulsating current – Angle modulation

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Details

375333, 375360, 375361, 375376, 327156, 331DIG3, 331 57, 331173, 331187, H04L27/22;7/033

Patent

active

059057599

ABSTRACT:
A data decoding circuit of the present invention can regenerate a bit synchronization signal from a data received by using a code such as a split-phase code and Manchester code in which a binary value can be detected through a transition of voltage at a central area of a bit cell and transform the received data into a serial binary data. The data decoding circuit includes an edge detection section for detecting a transition point in the received data; a pulse generating section for generating a phase comparing timing signal having a pulse width of substantially 1/(4.times.fs) when fs is a data transfer frequency and a received data regenerating signal having a pulse width of substantially 1(2.times.fs) in synchronism with an output of the edge detection means; a phase synchronization oscillation section synchronized in phase with the phase comparing timing signal for outputting a signal having a frequency n times the data transfer frequency fs; and a sampling section including means for generating the bit synchronization signal by dividing a frequency of a signal outputted from the phase synchronization oscillation means into 1
, means for sampling the received data regenerating signal based on the bit synchronization signal and means for transforming sampled signal into a serial binary data.

REFERENCES:
patent: 5363366 (1994-11-01), Wisdom, Jr. et al.
patent: 5581556 (1996-12-01), Ohie
patent: 5588027 (1996-12-01), Lim
patent: 5646562 (1997-07-01), Abe

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